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X93255
Data Sheet March 4, 2005 FN8187.0
Dual Digitally Controlled Potentiometers (XDCPsTM)
FEATURES * Dual solid-state potentiometers * Independent Up/Down interfaces * 32 wiper tap points per potentiometer --Wiper position stored in nonvolatile memory and recalled on power-up * 31 resistive elements per potentiometer --Temperature compensated --Maximum resistance tolerance 25% --Terminal voltage, 0 to VCC * Low power CMOS --VCC = 5V 10% --Active current, 200A typ. --Standby current, 4A max * High reliability --Endurance 200,000 data changes per bit --Register data retention, 100 years * RTOTAL value = 50k * Packages --14-lead TSSOP BLOCK DIAGRAM
DESCRIPTION The Intersil X93255 is a dual digitally controlled potentiometer (XDCP). The device consists of two resistor arrays, wiper switches, a control section, and nonvolatile memory. The wiper positions are controlled by individual Up/Down interfaces. A potentiometer is implemented by a resistor array composed of 31 resistive elements and a wiper switching network. The position of each wiper element is controlled by a set of independent CS, U/D, and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. Each potentiometer is connected as a two-terminal variable resistor and can be used in a wide variety of applications including: - bias and gain control - LCD Contrast Adjustment
VCC (Supply Voltage) RH1
30k 30k
Up/Down (U/D1) Increment (INC1) Device Select (CS1) Up/Down (U/D2) Increment (INC2) Device Select (CS2) VSS (Ground) Control and Memory Control and Memory RL1 RH2
RL2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
X93255
PIN CONFIGURATION
TSSOP DNC* RL1 CS1 INC2 U/D2 RH2 VSS 1 2 3 4 5 6 7 14 13 12 X93255 11 10 9 8 RH1 U/D1 INC1 VCC CS2 RL2 DNC*
*Do not connect.
X93255 ORDERING CODES Ordering Number
X93255UV14I
RTOTAL
50k
Package
14-lead TSSOP package
Temperature Range
-40C to +85C
PIN DESCRIPTIONS TSSOP
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Symbol
DNC RL1 CS1 INC2 U/D2 RH2 VSS DNC RL2 CS2 VCC INC1 U/D1 RH1
Do Not Connect. Low Terminal 1. Chip Select 1. Increment 2. Up/Down 2. High Terminal 2. Ground. Do Not Connect. Low Terminal 2. Chip Select 2. Supply Voltage. Increment 1. Up/Down 1. High Terminal 1.
Description
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ABSOLUTE MAXIMUM RATINGS Temperature under bias .................... -65C to +135C Storage temperature ......................... -65C to +150C Voltage on CS, INC, U/D, RH, RL and VCC with respect to VSS .............................. -1V to +6.5V Lead temperature (soldering 10 seconds) ......... 300C Maximum reflow temperature (40 seconds) ...... 240C Maximum resistor current ..................................... 2mA COMMENT Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only; the functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS Temperature Industrial Min. -40C Max. +85C Supply Voltage (VCC) X93255 Limits 5V 10%(7)
POTENTIOMETER CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.) Limits Symbol
RTOT VR
Parameter
End to end resistance RH, RL terminal voltages Power rating Noise
Min.
37.5 0
Typ.
50
Max.
62.5 VCC 1
Unit
k V mW(7) dBV(7) mA % MI(3) MI(3) pF
(5) (5)
Test Conditions/Notes
RTOTAL = 50k (5) (6) Ref: 1kHz(5) (6) (5) (6) (5) (6) (5) RH(n)(actual) - RH(n)(expected)(5) RH(n+1 - [RH(n)+MI] (5) See circuit #2(5)
-120 1000 0.6 3 1 0.5 35 10/10/25
RW IW
Wiper Resistance Wiper Current Resolution Absolute linearity(1) Relative linearity(2) RTOTAL temperature coefficient
ppm/C (5) (6)
CH/CL/CW
Potentiometer capacitances
Notes: (1) Absolute linearity is utilized to determine actual wiper resistance versus expected resistance = (RH(n)(actual) - RH(n)(expected)) = 1 Ml Maximum. n = 1 .. 29 only (2) Relative linearity is a measure of the error in step size between taps = RH(n+1) - [RH(n) + Ml] = 0.5 Ml, n = 1 .. 29 only. (3) 1 Ml = Minimum Increment = RTOT/31. (4) Typical values are for TA = 25C and nominal supply voltage. (5) This parameter is only applies to a single potentiometer (6) This parameter is guaranteed by characterization. (7) When performing multiple write operations, VCC must not decrease by more than 150mV from its initial value.
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D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.) Limits Symbol
ICC1 ICC2 ISB ILI ILI ILI VIH VIL CIN
(5)(7)
Parameter
VCC active current (Increment) per DCP VCC active current (Store) (EEPROM Store) per DCP Standby supply current CS CS INC, U/D input leakage current CS, INC, U/D input HIGH voltage CS, INC, U/D input LOW voltage CS, INC, U/D input capacitance
Min.
Typ.(4)
200
Max.
300 1400 4 1
Unit
A A A A A A V V pF
Test Conditions
CS = VIL, U/D = VIL or VIH and INC = 0.4V @ max. tCYC(5) CS = VIH, U/D = VIL or VIH and INC = VIH @ max. tWR(5) CS = VCC - 0.3V, U/D and INC = VSS or VCC - 0.3V VCS = VCC(5) VCC = 5V, CS = 0(5) VIN = VSS to VCC(5) (5) (5) VCC = 5V, VIN = VSS, TA = 25C, f = 1MHz(6)
120 VCC x 0.7 -0.5
200
250 1 VCC + 0.5 VCC x 0.1 10
ENDURANCE AND DATA RETENTION Parameter
Minimum endurance Data retention
Min.
200,000 100
Unit
Data changes per bit Years
Test Circuit #1
Test Point VH/RH
Circuit #2 SPICE Macro Model
RTOTAL RH CH 10pF CW 25pF CL 10pF RL
A.C. CONDITIONS OF TEST
Input pulse levels Input rise and fall times Input reference levels 0V to 5V 10ns 1.5V
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A.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified. In the table, CS, INC, U/D, RH and RL are used to refer to either CS1 or CS2, etc.) Limits Symbol
tCl tlD tDI tlL tlH tlC tCPH tCPH tCYC tR, tF(6) tR VCC(6) tWR
CS to INC setup INC HIGH to U/D change U/D to INC setup INC LOW period INC HIGH period INC Inactive to CS inactive CS Deselect time (NO STORE) CS Deselect time (STORE) INC cycle time INC input rise and fall time VCC power-up rate Store cycle
Parameter
Min.
100 100 100 1 1 1 250 10 2
Typ.(6)
Max.
Unit
ns ns ns s s s ns ms s
500 1 5 10,000 10
s V/ms ms
POWER-UP AND DOWN REQUIREMENTS There are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins provided that VCC is always more positive than or equal to VH and VL, i.e., VCC VH,VL. The VCC ramp rate spec is always in effect. A.C. TIMING (In the table, CS, INC, U/D, RH and RL are used to refer to either CS1 or CS2, etc.)
CS tCYC tCI INC tID tDI tF tIL tIH tIC (Store) tCPH 90% 90% 10% tR
U/D
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PIN DESCRIPTIONS RH and RL The RH and RL pins of the X93255 are equivalent to the end terminals of a variable resistor. The minimum voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction selected by the U/D input per potentiometer. Up/Down (U/D) The U/D input controls the direction of a single potentiometer's wiper movement and whether the counter is incremented or decremented. Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the pertatining potentiometer's counter in the direction indicated by the logic level on the pertaining potentiometer's U/D input. Chip Select (CS) A potentiometer is selected when the pertaining CS input is LOW. Its current counter value is stored in nonvolatile memory when the pertaining CS is returned HIGH while the pertaining INC input is also HIGH. After the store operation is complete the affected potentiometer will be placed in the low power standby mode until the potentiometer is selected once again. PRINCIPLES OF OPERATION There are multiple sections for each potentiometer in the X93255: an input control, a counter and decode section; the nonvolatile memory; and a resistor array. Each input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. Under the proper conditions the contents of the counter can be stored in nonvolatile memory and retained for future use. Each resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the connection at that point to the wiper. The wiper is connected to the RL terminal, forming a variable resistor from RH to RL. Each wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. If the wiper is moved several positions, multiple taps are connected to the wiper for up to 10s. The 2-terminal resistance value for the device can temporarily change by a significant amount if the wiper is moved several positions. When the device is powered-down, the last wiper position stored will be maintained in the nonvolatile memory for each potentiometer. When power is restored, the contents of the memory are recalled and each wiper is set to the value last stored.
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INSTRUCTIONS AND PROGRAMMING The INC, U/D and CS inputs control the movement of the pertaining wiper along the resistor array. With CS set LOW the pertaining potentiometer is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a five bit counter. The output of this counter is decoded to select one of thirty two wiper positions along the resistive array. The value of the counter is stored in nonvolatile memory whenever each CS transitions HIGH while the pertaining INC input is also HIGH. In order to avoid an accidental store during power-up, each CS must go HIGH with VCC during initial power-up. When left open, each CS pin is internally pulled up to VCC by an internal 30K resistor. The system may select the X93255, move any wiper and deselect the device without having to store the latest wiper position in nonvolatile memory. After the wiper movement is performed as described above and once the new position is reached, the system must keep INC LOW while taking CS HIGH. The new wiper position will be maintained until changed by the system or until a power-up/down cycle recalled the previously stored data. In order to recall the stored position of the wiper on power-up, the CS pin must be held HIGH. This procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjustments could be made. The adjustments might be based on user preference, system parameter changes due to temperature drift, or other system trim requirements. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move each wiper up and down until the proper trim is attained. MODE SELECTION CS
L L H H X L L L
INC
U/D
H L X X X H L
Wiper Up Wiper Down
Mode
Store Wiper Position Standby Current No Store, Return to Standby Wiper Up (not recommended) Wiper Down (not recommended)
SYMBOL TABLE
WAVEFORM
INPUTS Must be steady May change from Low to High May change from High to Low Don't Care: Changes Allowed N/A
OUTPUTS Will be steady Will change from Low to High Will change from High to Low Changing: State Not Known Center Line is High Impedance
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TSSOP PACKAGING INFORMATION
14-Lead Plastic, TSSOP, Package Code V14
.025 (.65) BSC
.169 (4.3) .252 (6.4) BSC .177 (4.5)
.193 (4.9) .200 (5.1)
.041 (1.05) .0075 (.19) .0118 (.30) .002 (.05) .006 (.15)
.010 (.25) Gage Plane 0 - 8 .019 (.50) .029 (.75) Detail A (20X) Seating Plane
.031 (.80) .041 (1.05) See Detail "A" NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 8
FN8187.0 March 4, 2005

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